Currently, thin film transistor liquid crystal displayers (TFT-LCD) are gaining higher occupancy in the market of flat panel displayers. The TFT-LCDs are developing to have large size, multiple color numbers and high resolution.
A Driver integrated circuit (Driver IC) in the existing TFT-LCD only provides same output modes regardless reversion of polarity. Since delay degree of waveforms output by the driver integrated circuit under the same polarity is different from that of waveforms output by the driver integrated circuits after the polarity is inverted, a dim line phenomenon would occur. FIG. 5a, FIG. 5b are schematic diagram of a prior art two point inverting method driving, wherein FIG. 5a is the schematic diagram of an n-th frame and FIG. 5b is the schematic diagram of an (n+1)-th frame. In a first column as shown in FIG. 5a, a gate line G1 in a first row and a gate line G2 in a second row are positive polarity, a gate line G3 in a third row and a gate line G4 in a fourth row are negative polarity. When a gate of the gate line G1 in the first row turns on, data transit from a negative level to a positive level; when a gate of the gate line G2 in the second row turns on, data transit from a positive level to a positive level; when a gate of the gate line G3 in the third row turns on, data transit from a positive level to a negative level; and when a gate of the gate line G4 in the fourth row turns on, data transit from a negative level to a negative level. When the polarity changes (for example, from negative to positive or from positive to negative), a driving area becomes larger relatively, which renders a longer delay in an output waveform, and when the polarity does not change (for example, from negative to negative or from positive to positive), it renders a shorter delay in an output waveform. The delay in the output waveform results in a charging difference of a pixel electrode, for example, since the gate line G1 in the first row and the gate line G3 in the third row have a change in polarity, charging degree of the pixel electrodes are lower, and since the gate line G2 in the second row and the gate line G4 in the fourth row have no change in polarity, the charging degree of the pixel electrodes are higher, thus it makes that there is a difference in the charging degree of the pixels in two adjacent rows, that is the charging degrees are not consistent.
FIG. 6 is an output waveform diagram of a prior art driver IC, in which a solid line denotes the output waveform of the gate line in the first row and a broken line denotes the output waveform of the gate line in the second row. For the gate line in the first row, the output polarity of the driver IC changes, an increase in the driving area results in a more serious delay in the charging degree; and for the gate line in the second row, the output polarity of the driver IC does not change, a decrease in the driving area results in a less serious delay in the charging degree. It can be seen from a comparison in FIG. 6 that the delay in the output of the gate line in the first row is greater than that of the gate line in the second row. Such a difference in output slew rate of the driver IC results in the dim line phenomenon and reduces picture display quality.